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David Murray
Galway, Ireland
Strongly focused on technology innovation by streamlining complex IC design and verification flows through tools, methodology and standards development. Note : Postings are my own opinions and do not necessarily represent the views of ARM
Recent Activity
The last few months have been a whirlwind of activity as my previous company Duolog got acquired by ARM. The good news is that the topic of IP Integration was a key aspect of the acquisition. ARM has been a customer of Socrates, our integration platform and could see great... Continue reading
Posted Nov 27, 2014 at Integration Insights
I'm presenting a paper titled 'Solving Next Generation IP Configurability' at DVCON this afternoon. This presentation highlightes the growing complexity of IP configuability and some of the impacts it is having on IP integration. The different standards are analysed to see how they deal with different configurability compexeties and are... Continue reading
Posted Mar 5, 2014 at Integration Insights
I'm presenting a paper at DVCON titled 'Leveraging IP-XACT Standardized IP Interfaces for Rapid IP Integration'. This paper highlights the need for Interface standardization and investigates how IP-XACT can be used to implement this standardiztion. It summarizes the metadata used to describe IP Interfaces and then presents different flows for... Continue reading
Posted Mar 5, 2014 at Integration Insights
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At DAC this year I had a lot of fun doing a live experiment to demonstrate some of the benefits and issues with concurrent design flows. I was at the Cadence Theatre doing a presentation called 'Controlling the costs of SoC integration' and I decided to make the presentation more... Continue reading
Posted Aug 2, 2012 at Integration Insights
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I'm delighted to announce that Duolog is holding an 'Integration Forum' at DAC this year. In the past 6 months, integration has been consistently recognized as one of the leading problems in IC design. Toward the end of last year, Mike Stellfox, Cadence indicated at (Verification futures 2011) that SoC... Continue reading
Posted May 30, 2012 at Integration Insights
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During this years EDA Consortium Annual (EDAC) CEO Forecast and Industry Vision, CEOs responded to a pre-panel question on the challenges of IC deisgn and cited ' integration' as a key issue. See Richard Goerings blog on this. The panel was comprised of : Edmund Cheng, President & CEO, Gradient... Continue reading
Posted Mar 8, 2012 at Integration Insights
As software is an increasingly important aspect of system development, product schedules are mandating the earlier development of software concurrently with hardware. The Hardware/Software (HW/SW) interface is a critical development artifact that plays a key role in efficient system realization. Here is a white paper presented at DVCON2012 that discusses... Continue reading
Posted Mar 7, 2012 at Integration Insights
As part of Monday's tutorial session, for the second year running, there was an Accellera 'Town-Hall' meeting where DVCON participants got the chance to ask questions regarding the future of the freshly named Accellera Systems Initiative. Richard Goering wrote about it here. The hot topic was of course the merger... Continue reading
Posted Feb 28, 2012 at Integration Insights
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Yes : SID is still around! SID is the 'Insidious Bug' that creeps around the front-end of the design flow. He lives in incomplete or ambiguous specifications. He thrives on misinterpretation. He lurks in parts of the design flow where design intent is heavily shared between different teams, and he... Continue reading
Posted Feb 24, 2012 at Integration Insights
Hi JL, Thanks for dropping by and taking a look at Socrates Bitwise. It was very popular during DAC. Some of the main benefits our customers are seeing are improved productivity and quality. Because we can automate register implementation from a single-source coherent specification, we avoid manual interpretation and translation boosting implementation quality and, almost more importantly, keeping all the implementation teams aligned. Another thing that was popular was the UVM Register package generator, showing that there is a big momentum toward UVM adoption. thanks again for spending time with us. regards, Dave Murray, Duolog
1 reply
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I’ve noticed recently that the word ‘automation’ can be used very loosely in the EDA industry as a presumption of productivity and quality. Here is a quirky take on 'Automation without abstraction' Continue reading
Posted Nov 19, 2010 at Integration Insights
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I've compiled the complete IP-XACT survey results here for anybody interested in them. Thanks to all who contributed. In general, I think a lot of useful information is contained in this survey. As with all surveys, they are open to interpretation - I've detailed mine in the following paragraphs. If... Continue reading
Posted Oct 1, 2010 at Integration Insights
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Recently Accellera kicked off the start of the next phase of the IP-XACT standard which includes a rapid requirements gathering timeframe. I thought it would be a good idea to get a snapshot (the good, the bad and the ugly) of where IP-XACT is at the moment and where you... Continue reading
Posted Sep 7, 2010 at Integration Insights
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IP-XACT, the standard structure for packaging, integrating, and reusing IP within tool flows is coming back on track with a kick-off meeting on Friday 27th August. IP-XACT, initially known as SPIRIT, was driven by the Spirit Consortium to help standardize IP packaging, integration and reuse. In June 2009, the IP-XACT... Continue reading
Posted Aug 27, 2010 at Integration Insights
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The dust is settling after a very busy DAC and, as usual, it is now that you realize how much work you have actually created for yourself in those few condensed days! Also, at this stage you have to watch out as the body readjusts to time zones, long-haul flights,... Continue reading
Posted Jun 25, 2010 at Integration Insights
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DAC is just around the corner (It seems to have been lurking there since DVCon in Feb) and besides going to the usual parties, there's quite a lot to get through. For my own part I have several talks to give (luckily later in the day), mentioned below. Feel free... Continue reading
Posted Jun 11, 2010 at Integration Insights
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EDA360 has been out for a few weeks now and I finally got around to exploring it in detail. I commented on my last blog that EDA360 was a clear indicator that the 'Elephant in the flow' - Chip Integration was spotted and was firmly under the scope of the... Continue reading
Posted May 25, 2010 at Integration Insights
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In June 2008, I published an article for ChipDesign Magazine, on an area of chip design which, from our customer experience, seemed to be burgeoning out of control. The article - ‘Is that an elephant in your flow?’, was a play on the elephant in the room idiom – something... Continue reading
Posted May 11, 2010 at Integration Insights
I received an email yesterday from Ralph von Vignau, president of the SPIRIT Consortium to the members of the SPIRIT Consortium. In this message Ralph highlighted the successful and beneficial merger of the SPIRIT consortium into the Accellera standardization organization. In particular Ralf thanked many people who supported the IP-XACT... Continue reading
Posted May 5, 2010 at Integration Insights
The Icelandic volcano is at it again and has twarted 2 attempts over 2 days for me to go to CDNLive in Munich where I was due to give two demos. I wouldn't mind, but last week I thought volcanos were cool as I peered over the crater of Vesuvius,... Continue reading
Posted May 5, 2010 at Integration Insights
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As a hardware design engineer, I was never comfortable when someone talked about IP integration as ‘stitching a chip together’. First of all, it sounded like a painful process involving sharp needles, usually preceded by a painful accident. I happened to be the recipient of said stitches when, at 8... Continue reading
Posted May 3, 2010 at Integration Insights
Richard Goering recently commented on the need for "Acceleration and Emulation and Why HW/SW integration needs both".This article defined and promoted acceleration and emulation as a good middle ground between Virtual and FPGA prototyping. Virtual models suffer from inaccuracy whilst FPGA suffers from poor debug. The following HW/SW interface models... Continue reading
Posted Apr 26, 2010 at Integration Insights
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Yesterday evening my young daughter asked me a question about chess, in particular, about ‘castling’. She had been playing chess at school when her classmate used the castling move, multiple times, from anywhere on the board – let’s say – not the standard castling move. I explained to her my... Continue reading
Posted Apr 23, 2010 at Integration Insights
Richard Goering, in his 'Industry Insights' blog, mentions some key points of Steve Glaser's Keynote in ISQED last week. Between the good news, the bad news and the numbers - 'Integration' was mentioned >12 times. In summary; The cost of IP integration is rising dramatically, however if we can create... Continue reading
Posted Mar 29, 2010 at Integration Insights